Starts 20 Nov 2017
Ends 1 Dec 2017
Central European Time
Giambiagi Lecture Hall (AGH)
Strada Costiera, 11 I - 34151 Trieste (Italy)
The school aims at providing key know-how of fully programmable systems on chip and its applications for scientific instrumentation and higher education. These novel devices combine general purpose processors with traditional FPGAs to achieve high performances with significant reduction in cost, power consumption and physical size. Fully programmable Systems-on-Chip (SoC) relay on embedded processing based on FPGA fabrics tightly interconnected with multicore processors. This means that the processor and the FPGA can be complementary used for what they do best. These devices are characterized by its low-cost along with a huge versatility to implement different concurrent tasks including critical activities such as hard real time hardware control, massive online digital signal processing, high performance data processing, and high speed data transmission. Other important characteristic is its unlimited reconfigurability to produce each time a new system with the same hardware. The above remarkable features make SoC devices very attractive for frontier scientific applications. The school will consist of about 65 hours of lectures, tutorials and assisted hands-on activities. The laboratory sessions will count on state-of-the-art software tools and hardware platforms based on modern SoC devices. The main topics of the school will include the fundamentals of: • Modern Digital Design and Digital Arithmetic • FPGA Technology • VHDL for Modeling, Simulation and Logic Synthesis • Multicore Processors for Embedded Systems • Embedded C Language Programming • Soc Design Methodology • Soc Architectures, Functional Blocks and External Interfaces • HW/SW System Design and High Level Synthesis • High Performance Data Acquisition and Processing • High Speed Data Transmission • Soc Trends and Advanced Scientific Applications • Laboratory Sessions for Hands-On Training and Experimentation Grants: “A limited number of grants are available to support the attendance of selected participants, with priority given to participants from developing countries. There is no registration fee.” Deadline: 03 September 2017


Andres Cicuttin (ICTP), Maria Liz Crespo (ICTP), Joseph Niemela (ICTP), Local Organiser: Maria Liz Crespo