### https://gist.github.com/hellerbarde/2843375 ###





    L1 cache reference ......................... 0.5 ns

    Branch mispredict ............................ 5 ns

    L2 cache reference ........................... 7 ns

    Mutex lock/unlock ........................... 25 ns

    Main memory reference ...................... 100 ns             

    SSD random read ........................ 150,000 ns  = 150 µs

    Read 1 MB sequentially from memory ..... 250,000 ns  = 250 µs

    Read 1 MB sequentially from SSD  ..... 1,000,000 ns  =   1 ms

    Disk seek ........................... 10,000,000 ns  =  10 ms

    Read 1 MB sequentially from disk .... 20,000,000 ns  =  20 ms

    Send packet CA->Netherlands->CA .... 150,000,000 ns  = 150 ms




















    L1 cache reference                  0.5 s
















    Branch mispredict                   5 s



    L2 cache reference                  7 s



    Mutex lock/unlock                   25 s



    Main memory reference               100 s











    SSD random read                     1.7 days



    Read 1 MB sequentially from memory  2.9 days



    Read 1 MB sequentially from SSD    11.6 days











    Disk seek                           16.5 weeks



    Read 1 MB sequentially from disk    7.8 months














    Send packet CA->Netherlands->CA     4.8 years