Description |
This hands-on workshop will cover key aspects of modern programmable Systems-on-Chip and its applications to advanced scientific instrumentation and reconfigurable computing. Emphasis will be given to Nuclear Applications with the collaboration of the Italian Institute of Nuclear Physics.
Systems-on-Chip (SoC) based on FPGA and dual-core processors are characterized by its low-cost along with a huge versatility to implement different concurrent tasks and critical activities such as hard real time hardware control and high performance multichannel data acquisition, processing and transmission. These remarkable features make SoC devices very attractive for frontier scientific applications. The workshop will consist of about 65 hours of theoretical lectures and assisted hands-on activities. The laboratory sessions will count on state-of-the-art software tools and development hardware platforms. The selected faculty will be composed by lecturers and speakers from prestigious universities, hi-tech companies and research institutions. The workshop will be primarily addressed to researchers, teachers and engineers of various disciplines who need to master cutting-edge technologies for their scientific, academic and professional activities. TOPICS:
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Advanced Workshop on FPGA-based Systems-On-Chip for Scientific Instrumentation and Reconfigurable Computing | (smr 3249)
Go to day
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-
08:30 - 18:30
Location: Leonardo Building - Budinich Lecture Hall -
08:30
Administrative procedure - registration and payments
3h0'
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11:30
Opening
40'
Welcome Workshop Outline Brief introduction from participants
Speaker: A.Cicuttin, M.L.Crespo, S. Levorato (ICTP, ICTP, INFN section Trieste, Italy) -
12:10
Worskhop outline and ICTP programmes
20'
Speaker: M.L. Crespo (ICTP) Material: Slides - 12:30 Lunch break 1h30' ( Leonardo Building - Cafeteria )
-
14:00
All-Programmable System-on-Chip (SoC) technology
2h0'
Speaker: C. Sisterna (Universidad Nacional de San Juan, Argentina) Material: Slides - 16:00 Coffee break 30' ( Leonardo Building - Lobby )
-
16:30
The SoC Architecture and Design Methodology
2h0'
Speaker: C. Sisterna (Universidad Nacional de San Juan, Argentina) Material: Slides
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08:30
Administrative procedure - registration and payments
3h0'
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08:30 - 18:30
-
-
09:00 - 18:30
Location: Adriatico Guest House - Giambiagi Lecture Hall -
09:00
Fundamentals of Particle Detectors
1h30'
Speaker: F. Tessarotto (INFN section Trieste, Italy) Material: Slides - 10:30 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
11:00
Front-Ends and DAQ for Particle Physics experiments
1h30'
Speaker: I. Konorov (Technische Universitat Munchen, Germany) Material: Slides - 12:30 Lunch break 1h30' ( Adriatico Guest House - Cafeteria )
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14:00
Design Methodology for SoC
1h0'
Speaker: C. Sisterna (Universidad Nacional de San Juan, Argentina) Material: Slides -
15:00
C for Embedded Systems
1h0'
Speaker: C. Sisterna (Universidad Nacional de San Juan, Argentina) - 16:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
16:30
The Zynq Evaluation and Development Board
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: C. Sisterna (Universidad Nacional de San Juan, Argentina) Material: Slides -
17:30
Lab Tutorial: Design flow based on the processing system
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: C. Sosa Paez (Universidad Nacional de San Juan, Argentina)
-
09:00
Fundamentals of Particle Detectors
1h30'
-
09:00 - 18:30
-
-
09:00 - 18:30
Location: Adriatico Guest House - Giambiagi Lecture Hall -
09:00
The new generation of Intelligent FPGA based DAQ architectures
1h30'
Speaker: I. Konorov (Technische Universitat Munchen, Germany) Material: Slides - 10:30 Coffee break 30' ( Adriatico Guest House - Cafeteria )
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11:00
Selected topics in digital design for FPGA
1h30'
Speaker: S. P. Bazargan (Universite Pierre Et Marie Curie, France) - 12:30 Lunch break 1h30' ( Adriatico Guest House - Cafeteria )
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14:00
C for Embedded Systems (cont.)
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: C. Sisterna (Universidad Nacional de San Juan, Argentina) Material: Slides -
15:00
Lab Tutorial: Building a complete Embedded System
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: R. Molina (Universidad de Castilla la Mancha, Spain) - 16:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
16:30
Lab activities with Tutors
2h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
-
09:00
The new generation of Intelligent FPGA based DAQ architectures
1h30'
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09:00 - 18:30
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-
09:00 - 21:00
Location: Adriatico Guest House - Giambiagi Lecture Hall -
09:00
Digital arithmetic and numerical representations
1h0'
Speaker: S. P. Bazargan (Universite Pierre Et Marie Curie, France) - 10:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
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10:30
FPGAs computing just right thanks to application-specific arithmetic
1h0'
Speaker: F. De Dinechin (National Institut of Applied Sciences, France) Material: Slides -
11:30
The FloPoCo arithmetic core generator
1h0'
Speaker: F. De Dinechin (National Institut of Applied Sciences, France) Material: Slides - 12:30 Lunch break 1h30' ( Adriatico Guest House - Cafeteria )
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14:00
Hardware and Software Interrupts
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: C. Sisterna (Universidad Nacional de San Juan, Argentina) Material: Slides -
15:00
Lab Tutorial: Hardware and Software Interrupts
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: R. Melo (Instituto Nacional de Tecnologia Industrial, Centro de Micro y Nanoelectronica del Bicentenario, Argentina) - 16:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
16:30
Lab activities with Tutors
2h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
- 19:00 Welcome reception 2h0' ( Adriatico Guest House - Cafeteria )
-
09:00
Digital arithmetic and numerical representations
1h0'
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09:00 - 21:00
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-
09:00 - 18:30
Location: Adriatico Guest House - Giambiagi Lecture Hall -
09:00
Floating point operators: Square Root and Division
1h0'
Speaker: S. P. Bazargan (Universite Pierre Et Marie Curie, France) - 10:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
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10:30
FreeRTOS operating system for SoC
1h0'
Speaker: F. Rincon Calle (Universidad de Castilla la Mancha, Spain) Material: Slides -
11:30
TCP/IP communication with FreeRTOS
1h0'
Speaker: F. Rincon Calle (Universidad de Castilla la Mancha, Spain) Material: Slides - 12:30 Lunch break 1h30' ( Adriatico Guest House - Cafeteria )
-
14:00
Lab Tutorial: First steps with FreeRTOS
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: F. Rincon Calle (Universidad de Castilla la Mancha, Spain) Material: Slides -
15:00
Python fundamentals
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: J.A. De la Torre (Universidad de Castilla la Mancha, Spain) Material: Slides - 16:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
16:30
PyQT for Graphical User Interface (GUI) Development
30' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: J.A. De la Torre (Universidad de Castilla la Mancha, Spain) Material: Slides -
17:00
Lab Tutorial: A PyQT GUI for a SoC design
1h30' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: J.A. De la Torre (Universidad de Castilla la Mancha, Spain)
-
09:00
Floating point operators: Square Root and Division
1h0'
-
09:00 - 18:30
-
-
09:00 - 18:30
Location: Adriatico Guest House - Giambiagi Lecture Hall -
09:00
High Level Synthesis (HLS) I
1h0'
Speaker: F. Rincon Calle (Universidad de Castilla la Mancha, Spain) Material: Slides - 10:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
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10:30
High Level Synthesis (HLS) II
1h0'
Speaker: F. Rincon Calle (Universidad de Castilla la Mancha, Spain) -
11:30
Lab Tutorial: HLS and IDE Integration I
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: F. Rincon Calle (Universidad de Castilla la Mancha, Spain) Material: Slides - 12:30 Lunch break 1h30' ( Adriatico Guest House - Cafeteria )
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14:00
Lab: HLS and IDE Integration II
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: Tutors -
15:00
Lab Tutorial: A PyQT GUI for a SoC design (cont)
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: J.A. De la Torre (Universidad de Castilla la Mancha, Spain) - 16:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
16:30
Lab Tutorial: from HLS to a PyQT GUI with TCP/IP communication
2h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: J.A. De la Torre (Universidad de Castilla la Mancha, Spain)
-
09:00
High Level Synthesis (HLS) I
1h0'
-
09:00 - 18:30
-
-
09:00 - 18:30
Location: Adriatico Guest House - Giambiagi Lecture Hall -
09:00
The Era of All Programmable SoC: challenges for instrumentation and supercomputing I
1h0'
Speaker: N. Abdallah (Software and System Engineering, SoC Products, Microsemi, U.S.A.) - 10:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
10:30
The Era of All Programmable SoC: challenges for instrumentation and supercomputing II
1h0'
Speaker: N. Abdallah (Software and System Engineering, SoC Products, Microsemi, U.S.A.) -
11:30
AXI Custom IP
1h0'
Speaker: C. Sisterna (Universidad Nacional de San Juan, Argentina) Material: Slides - 12:30 Lunch break 1h30' ( Adriatico Guest House - Cafeteria )
-
14:00
TCP/IP communication: The LwIP library
1h0'
Speaker: F. Rincon Calle (Universidad de Castilla la Mancha, Spain) -
15:00
Lab Tutorial: Custom AXI-Slave IP Core
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: C. Sosa Paez (Universidad Nacional de San Juan, Argentina) - 16:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
16:30
Lab activities with Tutors
2h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
-
09:00
The Era of All Programmable SoC: challenges for instrumentation and supercomputing I
1h0'
-
09:00 - 18:30
-
-
09:00 - 18:30
Location: Adriatico Guest House - Giambiagi Lecture Hall -
09:00
SoC FPGA Design Verification and Timing Concepts
1h0'
Speaker: N. Abdallah (Software and System Engineering, SoC Products, Microsemi, U.S.A.) - 10:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
10:30
Reconfigurable Virtual Instrumentation (RVI) based on SoC
1h0'
Speaker: A. Cicuttin (ICTP) -
11:30
Lab activities with Tutors
1h0' (
Adriatico Guest House - Informatics Laboratory
)
Speaker: Tutors - 12:30 Lunch break 1h30' ( Adriatico Guest House - Cafeteria )
-
14:00
From FPGA-based Reconfigurable Systems to Autonomic Heterogeneous Computing Systems
1h30'
Speaker: M. Santambrogio (Politecnico di Milano, Italy) Material: Slides - 15:30 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
16:00
Lab Tutorial: The RVI communication block (CommBlock)
2h30' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: K.S. Mannatunga (University of Moratuwa, Sri Lanka)
-
09:00
SoC FPGA Design Verification and Timing Concepts
1h0'
-
09:00 - 18:30
-
-
09:00 - 18:30
Location: Adriatico Guest House - Giambiagi Lecture Hall -
09:00
The RISK V architecture I
1h0'
Speaker: N. Abdallah (Software and System Engineering, SoC Products, Microsemi, U.S.A.) - 10:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
10:30
The RISK V architecture II
1h0'
Speaker: N. Abdallah (Software and System Engineering, SoC Products, Microsemi, U.S.A.) -
11:30
AXI data transfer caracterization in Zynq devices
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: R. Melo (Instituto Nacional de Tecnologia Industrial, Centro de Micro y Nanoelectronica del Bicentenario, Argentina) Material: Slides - 12:30 Lunch break 1h30' ( Adriatico Guest House - Cafeteria )
-
14:00
A Single Photon Detector System Based on Micropattern Gaseous Electron Multiplier
1h0'
Speaker: S. Levorato (INFN section Trieste, Italy) Material: Slides -
15:00
Lab. Tutorial: How to access the RVI CommBlock
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: B. Valinoti (Instituto Nacional de Tecnologia Industrial, Centro de Micro y Nanoelectronica del Bicentenario, Argentina) - 16:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
16:30
DEMO: Thick-GEM based Particle Detector System: from Signal Generation to Data Acquisition and Processing
1h0' (
Multidiscliplinary Laboratory
)
Speaker: S. Levorato (INFN section Trieste, Italy) -
17:30
DEMO: A data acquisition and processing system based on SoC for particle detectors
1h0' (
Multidiscliplinary Laboratory
)
Speaker: L. Garcia Ordoñez (Universidad de San Carlos de Guatemala / ICTP)
-
09:00
The RISK V architecture I
1h0'
-
09:00 - 18:30
-
-
09:00 - 17:30
Location: Adriatico Guest House - Giambiagi Lecture Hall -
09:00
Academic writing skills for research journal article
1h0'
Speaker: Mamun Bin Ibne Reaz (University Kebangsaan Malaysia, Malaysia) Material: Slides - 10:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
10:30
Lab. Tutorial: Advanced project based on SoC
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
Speaker: L. Garcia Ordoñez (Universidad de San Carlos de Guatemala / ICTP) -
11:30
Lab activities with Tutors
1h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
- 12:30 Lunch break 1h30' ( Adriatico Guest House - Cafeteria )
-
14:00
Lab activities with Tutors
2h0' (
Adriatico Guest House - Informatics Lab (Lower Level 1)
)
- 16:00 Coffee break 30' ( Adriatico Guest House - Cafeteria )
-
16:30
Concluding Remarks and Distribution of Certificates
1h0'
Speaker: M.L. Crespo, A. Cicuttin (ICTP)
-
09:00
Academic writing skills for research journal article
1h0'
-
09:00 - 17:30