Scientific Calendar Event



Description
An ICTP Virtual Meeting

The School will focus on the development of scientific instrumentation based on fully programmable Systems-on-Chip (SoC) and embedded microcontrollers. The aim is to provide appropriate methodological practices and key know-how to effectively take advantage of this technology for applications in research and industry.
 
Modern SoC are extremely exible and performant devices, being able to run traditional software in their powerful microprocessors and make use of the high-performance logic of their FPGA fabric. The characteristic versatility of this technology is a key aspect in allowing the implementation of advanced instruments, and is often essential for applications that require parallel data acquisition, real-time processing and high-speed data transmission.

Microcontrollers are widely used in different areas such as consumer electronics, and industrial and scientific applications. They integrate energy-efficient processing cores with application-specific peripherals in a compact device. They are used for control in many scientific instruments, and for low-to mid-performance data acquisition up to the operation of complete instruments in simpler applications.

Participants will be familiarized with professional software design tools and hardware platforms through theoretical lectures, demonstrations, tutorials and practical exercises, and will apply the acquired knowledge in projects. In addition, they will be introduced to an open-source SoC-FPGA firmware platform, providing a well-tested interface with the control computer.

Lectures will be held daily from 1pm to 5pm CET.  Discussions will be held using an online collaboration platform.  Candidates that need to use SoC-FPGA and embedded microcontrollers for their research projects are especially encouraged to apply.


Topics:
• Systems-on-Chip: Architecture and Design Methodology
• Hardware/Software Interface Design
• VHDL for FPGA design, Modeling and Logic Synthesis
• Embedded Microcontrollers: Architecture and Common Peripherals
• Programming in Bare-Metal and Real-time Operating Systems
• Design Automation Tools and High Level Synthesis
• FPGA for Acceleration of Arti cial Intelligence and
         Machine Learning Algorithms
• Real-time Data Acquisition, Processing and Transmission

Directors:
NATHAN BERKOVITS, ICTP-SAIFR, Brazil
LUIGI CALLIGARIS, NCC UNESP, Brazil
ANDRES CICUTTIN, ICTP, Italy
MARIA LIZ CRESPO, ICTP, Italy

SERGIO NOVAES, NCC UNESP, Brazil

ICTP Scientific Contact:
MARIA LIZ CRESPO, ICTP, Italy

UNESP Organizing Committee:
LUIGI CALLIGARIS, NCC UNESP, Brazil
ANDRE CASCADAN, NCC UNESP, Brazil
THIAGO TOMEI FERNANDEZ, NCC UNESP, Brazil


Registration:  There is no registration fee
Go to day
  • Monday, 18 October 2021
    • 14:00 - 18:00 Session 1
      Chairs: 
      Maria Liz CRESPO / Luigi CALLIGARIS
      
      The time zone is CET
      You can choose your time zone (in place of Europe/Rome) on the top right 
      of the page and the Programme time will be modified accordingly
      • 14:00 Welcome to the School 15'
        Speaker: Nathan BERKOVITS (ICTP-SAIFR, Brazil), Luigi CALLIGARIS (NCC-UNESP, Brazil), Andre CASCADAN (NCC-UNESP, Brazil), Andres CICUTTIN (ICTP), Maria Liz CRESPO (ICTP), Sergio NOVAES (NCC-UNESP, Brazil)
        Material: Video
      • 14:15 School Outline 15'
        Speaker: Maria Liz CRESPO (ICTP)
        Material: Slides
      • 14:30 Microcontrollers Technology, Architecture and Peripherals 1h0'
        Speaker: Luigi CALLIGARIS (NCC-UNESP, Brazil)
        Material: Slides
      • 15:30 FPGA and System on Chip (SoC) Technology 1h0'
        Speaker: Cristian SISTERNA (University of San Juan, Argentina)
        Material: Slides
      • 16:30 C for Embedded Systems 1h30'
        Speaker: Cristian SISTERNA (University of San Juan, Argentina)
        Material: Slides
  • Tuesday, 19 October 2021
    • 14:00 - 18:30 Session 2
      Chair: Andres CICUTTIN (ICTP)
      • 14:00 Real Time Operating System (FreeRTOS) 1h30'
        Speaker: Julio DONDO (University of San Luis, Argentina)
        Material: Slides Video
      • 15:30 Hardware and Software Interrupts on SoC 1h0'
        Speaker: Cristian SISTERNA (University of San Juan, Argentina)
        Material: Slides
      • 16:30 STM32 Evaluation and Development Boards 30'
        Speaker: Luigi CALLIGARIS (NCC-UNESP, Brazil)
        Material: Slides Video
      • 17:00 MCU Lab setup and exercises with Tutors 1h30'
        Speaker: Luigi CALLIGARIS and Andre CASCADAN (NCC-UNESP Brazil)
  • Wednesday, 20 October 2021
    • 14:00 - 18:30 Session 3
      Chair: Andre CASCADAN
      • 14:00 SoC Architecture and Design Methodology 1h0'
        Speaker: Cristian SISTERNA (University of San Juan, Argentina)
        Material: Slides Video
      • 15:00 Fundamentals of VHDL (Hardware Description Language) 1h0'
        Speaker: Rodrigo MELO (I-TERA, Cordoba, Argentina)
        Material: Video
      • 16:00 VHDL for Synthesis 1h0'
        Speaker: Rodrigo MELO (I-TERA, Cordoba, Argentina)
        Material: Slides
      • 17:00 MCU Lab exercises and Tutors 1h30'
        Speaker: Luigi CALLIGARIS and Andre CASADAN (NCC-UNESP, Brazil)
  • Thursday, 21 October 2021
    • 14:00 - 18:30 Session 4
      Chair: Maria Liz CRESPO
      • 14:00 Design Methodology for SoC. AXI Bus and Custom IP 1h0'
        Speaker: Cristian SISTERNA (University of San Juan, Argentina)
        Material: Slides Video
      • 15:00 VHDL for Simulation 1h0'
        Speaker: Rodrigo MELO (I-TERA, Cordoba, Argentina)
        Material: Slides Video
      • 16:00 The Open IPMC project (and possible demonstration) 1h0'
        Speaker: Andre CASCADAN (NCC-UNESP, Brazil)
        Material: Slides Video
      • 17:00 MCU Lab exercises and Tutors 1h30'
        Speaker: Luigi CALLIGARIS and Andre CASCADAN (NCC-UNESP, Brazil)
  • Friday, 22 October 2021
    • 14:00 - 19:00 Session 5
      Chairs: Andres CICUTTIN / Luigi CALLIGARIS
      • 14:00 Zynq Evaluation and Development Board 1h30'
        Speaker: Cristian SISTERNA (University of San Juan, Argentina)
        Material: Slides Video
      • 15:30 Automotive ECU Development 1h0'
        Speaker: Eugenio GRIMA (SPRACE, Sao Paulo, Brazil)
        Material: Slides
      • 16:30 MCU Lab exercises with Tutors 1h0'
        Speaker: Luigi CALLIGARIS and Andre CASADAN (NCC-UNESP, Brazil)
      • 17:30 MCU Lab exercises with Tutors 1h0'
        Speaker: Luigi CALLIGARIS and Andre CASADAN (NCC-UNESP, Brazil)
  • Monday, 25 October 2021
    • 14:00 - 19:00 Session 6
      Chair: Maria Liz CRESPO
      • 14:00 High Level Synthesis (HLS) 1h30'
        Speaker: Fernando RINCON CALLE (University of Castilla La Mancha, Spain)
        Material: Video
      • 15:30 Setup of the remote SoC-FPGA Lab 1h0'
        Speaker: Luis GARCIA ORDONEZ (University of Trieste / ICTP)
      • 16:30 Lab Tutorial 1h0'
        Speaker: Ivan MORALES (ICTP)
      • 17:30 SoC-FPGA Lab exercises with Tutors 1h30'
        Speaker: Luis GARCIA, Werner FLORIAN, Bruno VALINOTI, Romina MOLINA (University of Trieste/ICTP), Ivan MORALES (ICTP), Cristian SISTERNA (University of San Juan, Argentina)
  • Tuesday, 26 October 2021
    • 14:00 - 19:00 Session 7
      Chair: Luigi CALLIGARIS
      • 14:00 New SoC platforms for Al and Algorithm Accelerationl 1h30'
        Speaker: Gustavo SUTTER (Universidad Autonoma de Madrid, Spain)
        Material: Slides Video
      • 15:30 Reconfigurable Virtual Instrumentation (RVI) based on SoC-FPGA 1h0'
        Speaker: Andres CICUTTIN (ICTP)
        Material: Slides Video
      • 16:30 The RVI communication block: ComBlock 1h0'
        Speaker: Rodrigo MELO (I-TERA, Cordoba, Argentina)
        Material: Slides Video
      • 17:30 SoC-FPGA Lab exercises with Tutors 1h30'
        Speaker: Luis GARCIA, Werner FLORIAN, Bruno VALINOTI, Romina MOLINA (University of Trieste/ICTP), Ivan MORALES (ICTP), Cristian SISTERNA (University of San Juan, Argentina)
  • Wednesday, 27 October 2021
    • 14:00 - 19:00 Session 8
      Chair: Andre CASCADAN
      • 14:00 FPGA for the Acceleration of Machine Learning Algorithms 1h30'
        Speaker: Romina MOLINA (University of Trieste/ICTP)
        Material: Slides Video
      • 15:30 Integrating a real-time operating system and a Linux one in a ZynqMP system 1h0'
        Speaker: Oliver SANDER (Karlsruhe Institute of Technology, Germany)
        Material: Slides Video
      • 16:30 SoC-FPGA Development Framework: UDMA & CLI 1h0'
        Speaker: Werner FLORIAN (University of Trieste/ICTP)
        Material: Slides Video
      • 17:30 SoC-FPGA Lab exercises with Tutors 1h30'
        Speaker: Luis GARCIA, Werner FLORIAN, Bruno VALINOTI, Romina MOLINA (University of Trieste/ICTP), Ivan MORALES (ICTP), Cristian SISTERNA (University of San Juan, Argentina)
  • Thursday, 28 October 2021
    • 14:00 - 19:00 Session 9
      Chair: Andres CICUTTIN
      • 14:00 Introduction to Quantum Computing / Quantum Computing Emulator based on FPGA 1h30'
        Speaker: Agustin SILVA (ICTP)
        Material: Slides Video
      • 15:30 Python Scripting 1h0'
        Speaker: Bruno VALINOTI (University of Trieste/ICTP)
        Material: Video
      • 16:30 SoC-FPGA Lab exercises with Tutors 2h30'
        Speaker: Luis GARCIA, Werner FLORIAN, Bruno VALINOTI, Romina MOLINA (University of Trieste/ICTP), Ivan MORALES (ICTP), Cristian SISTERNA (University of San Juan, Argentina)
  • Friday, 29 October 2021
    • 14:00 - 19:00 Session 10
      Chair: Maria Liz CRESPO
      • 14:00 FOSS (Free Open Source Software) for FPGA 1h0'
        Speaker: Rodrigo MELO (I-TERA, Cordoba, Argentina)
        Material: Slides
      • 15:00 SoC-FPGA DAQ System: Demo 1h0'
        Speaker: Luis GARCIA ORDONEZ (University of Trieste/ICTP)
      • 16:00 SoC-FPGA Lab exercises with Tutors 2h0'
        Speaker: Luis GARCIA, Werner FLORIAN, Romina MOLINA (University of Trieste/ICTP), Ivan MORALES (ICTP), Cristian SISTERNA (University of San Juan, Argentina)
      • 18:00 ICTP Programmes 30'
        Speaker: Maria Liz CRESPO (ICTP)
      • 18:30 Closing Remarks by School Directors 30'