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SUMMARY:Recent Advances in NanoMOSFET Technology
DTSTART;VALUE=DATE-TIME:20070910T140000Z
DTEND;VALUE=DATE-TIME:20070910T180000Z
DTSTAMP;VALUE=DATE-TIME:20260314T015618Z
UID:indico-event-a07239@ictp.it
DESCRIPTION:Abstract:\n\nHigh density integrated circuits (HDICs) are faci
 ng challenges in their further development aiming higher device performanc
 es. HDICs performances have been improved by shrinking transistor’s dime
 nsions which are now at the nanoscale. \nLow dimensions led to device engi
 neering such as the AHLATID\, LDD\, Large angle Tilt\, LATID or drain engi
 neered MOSFETs.  ONO MOSFETs are introduced to increase gate dielectric br
 eakdown\, which is more pronounced using high k dielectric such as Hafnium
  oxide HfO2.Besides the engineered MOSFET\, SOI (Silicon On Insulator) is 
 an alternative technology to overcome short channel effects (especially ho
 t carriers) in HDICs. SOI devices can be single or double gate\, rectangul
 ar or surrounded gate. Bulk MOSFETs are featured to include drain halo dop
 ing to reduce impact ionization near the drain regions. \n\nNew device tec
 hnologies are introduced in the case of NanoMOSFETs\, Ultrathin body MOSFE
 T and ballistic MOSFETs in which electronic transport models are based on 
 ballistic transport are the candidates for the future HDCIs. The CNFET (Ca
 rbon Nanotube MOSFET) is another alternative of NanoFETs but not ready at 
 all for the HDICs integration. The same thing is observed in the case of t
 he Molecular Transistor which is under investigation and developments.\n\n
 //indico.ictp.it/event/a07239/
LOCATION:ICTP Main Building New Conference Room (237)
URL://indico.ictp.it/event/a07239/
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