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VERSION:2.0
PRODID:-//CERN//INDICO//EN
BEGIN:VEVENT
SUMMARY:Laboratory Session: Digital Signal Processing with FPGA. A design 
 example.
DTSTART;VALUE=DATE-TIME:20091116T150000Z
DTEND;VALUE=DATE-TIME:20091116T170000Z
DTSTAMP;VALUE=DATE-TIME:20260514T072241Z
UID:indico-contribution-78@ictp.it
DESCRIPTION:Speakers: C. SOSA PAEZ ()\n//indico.ictp.it/event/a08187/sessi
 on/127/contribution/78
LOCATION:Trieste - Italy Adriatico Guest House Informatics Lab.
URL://indico.ictp.it/event/a08187/session/127/contribution/78
END:VEVENT
END:VCALENDAR