BEGIN:VCALENDAR
VERSION:2.0
PRODID:-//CERN//INDICO//EN
BEGIN:VEVENT
SUMMARY:Laboratory Session. Implementation in the FPGA Development Platfor
 m. VHDL Package and Structural Design. Bidirectional Parallel Port Communi
 cation.
DTSTART;VALUE=DATE-TIME:20080627T143000Z
DTEND;VALUE=DATE-TIME:20080627T170000Z
DTSTAMP;VALUE=DATE-TIME:20240229T161501Z
UID:indico-contribution-54@ictp.it
DESCRIPTION:Speakers: MARIA LIZ CRESPO ()\n//indico.ictp.it/event/a07186/s
 ession/94/contribution/54
LOCATION:Kuala Lumpur - Malaysia
URL://indico.ictp.it/event/a07186/session/94/contribution/54
END:VEVENT
END:VCALENDAR