Regional Workshop and Conference on Advanced Reconfigurable Instrumentation for Scientific Applications | (smr 2816) (14-25 November 2016)

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Displaying 34 contributions out of 34

Advanced SoC-FPGA Trends

Session: Friday, 18 November 2016

Advanced SoC-FPGA Trends

Session: Friday, 18 November 2016

Demo on Zedboard

Session: Friday, 18 November 2016

Distribution of certificates

Session: Friday, 25 November 2016

Embedded C in Zynq

Session: Wednesday, 23 November 2016

Embedded System Design

Session: Wednesday, 23 November 2016

Essentials of Digital Design

Session: Thursday, 17 November 2016

Essentials of Digital Design

Session: Thursday, 17 November 2016

Introduction to AXI Interface

Session: Tuesday, 22 November 2016

Introduction to Zynq Architecture

Session: Friday, 18 November 2016

Modern Digital Arithmetic

Session: Friday, 18 November 2016

Opening

Session: Thursday, 17 November 2016

Programmable SoC Architecture

Session: Tuesday, 22 November 2016

PyQT Design Example with Ethernet Communication

Session: Friday, 25 November 2016

PyQT Design Example with Ethernet Communication

Session: Friday, 25 November 2016

Serial communication interface with FPGA

Session: Tuesday, 22 November 2016

Serial communication interface with FPGA

Session: Tuesday, 22 November 2016

SoC Design Methodology

Session: Thursday, 17 November 2016

SoC design based on Zynq device. Programmable Logic (PL)

Session: Monday, 21 November 2016

SoC-FPGA Fundamentals

Session: Thursday, 17 November 2016

Timers and Interruptions

Session: Thursday, 24 November 2016

VHDL for Implementing Digital Systems into FPGAs

Session: Monday, 21 November 2016

VHDL for Implementing Digital Systems into FPGAs

Session: Monday, 21 November 2016

Vivado Design Suite Process

Session: Thursday, 17 November 2016

ZedBoard System Architecture

Session: Thursday, 24 November 2016

ZedBoard configuration and design example (Tutorial)

Session: Friday, 25 November 2016

Zedboard Interface

Session: Friday, 25 November 2016

Zinq design. Processing System. Memory test. (Lab Tutorial)

Session: Wednesday, 23 November 2016

Zinq design. Programmable Logic. (Lab Tutorial)

Session: Monday, 21 November 2016

Zynq Architecture: Processing System and Programmable Logic

Session: Tuesday, 22 November 2016

Zynq Architecture: Processing System and Programmable Logic

Session: Tuesday, 22 November 2016

Zynq design using GPIO IP Cores in PL

Session: Thursday, 24 November 2016

Zynq design using GPIO IP Cores in PL (Lab Tutorial)

Session: Thursday, 24 November 2016

Zynq design. Processing System (PS)

Session: Wednesday, 23 November 2016

Organizers

Andres Cicuttin, Maria Liz Crespo, Mamun Bin Ibne Reaz

Co-sponsors

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