Laboratory Session (VHDL simulation environment, simple examples)
Place
Location: Trieste - Italy
Date:
29 Nov 16:00 - 18:00
Timetable | Contribution List
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Presented by MARIA LIZ CRESPO
on
29/11/2006
at
16:00
Organizers
Directors: N. Abdallah, A. Cicuttin, A. Vacchi