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Sinthesis II - Introduction to VHDL

Place

Location: Trieste - Italy
Date: 27 Oct 14:30 - 15:30

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14:00
15:00
Sinthesis II - Introduction to VHDL
Adriatico Guest House Kastler Lecture Hall, Trieste - Italy

Organizers

Directors: N. Abdallah, A. Cicuttin, A. Marchioro. Local Organizer: M.L. Crespo