Scientific Calendar Event



Home > Timetable > Session details
PDF | iCal

Course Overview, Introduction to FPGA Synthesis I, Introduction to VHDL

Place

Location: Trieste - Italy
Date: 27 Nov 14:15 - 15:15

Timetable | Contribution List

Displaying 1 contribution out of 1
Building timetable...

Organizers

Directors: N. Abdallah, A. Cicuttin, A. Vacchi