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BALLINA ESCOBAR MAYNOR GIOVANNI
(ICTP Multidisciplinary Laboratory)
HyperFPGA: Heterogeneous Computing on MPSoC-FPGA at ICTP
HyperFPGA__Heterogeneous_Computing_on_MPSoC-FPGA_.pptx.pdf
Introduction to Laboratory Activities
Introduction_to_Laboratory_Activities.pptx.pdf
Guide for Lab 3 - High-Level Synthesis (HLS) for Heterogeneous Computing
High-Level_Synthesis_(HLS)_for_Heterogeneous_Computing.pptx.pdf
CRESPO MARIA LIZ
(ICTP)
Participant Presentations
Participant Presentations
Participant Presentations
GARCIA ORDONEZ LUIS GUILLERMO
(ICTP Multidisciplinary Laboratory (MLAB) Science, Technology, and Innovation (STI) Unit)
Guide for Lab 2 - Reconfigurable Instrumentation on MPSoC-FPGA
Reconfigurable_Instrumentation_on_MPSoC-FPGA_—_Lab_2.pdf
LAB TUTORS
Lab 2 with Tutors
Lab 2 with Tutors
Lab 3 with Tutors
Lab 3 with Tutors
MANNATUNGA KASUN SAMEERA
(University of Moratuwa Department of Electronics & Telecommunication Engineering)
SoC-Based Multimodal Physiological Signal Acquisition for Robotic Rehabilitation
SoC-Based_Multimodal_Physiological_Signal_Acquisition_for_Robotic_Rehabilitation.pdf
MOLINA ROMINA SOLEDAD
(Multidisciplinary Laboratory (MLAB) Science, Technology, and Innovation (STI) Unit)
Introduction to Machine Learning and Edge AI
18Sep2026-RominaMolina-Introduction_to_Machine_Learning_and_Edge_AI.pdf
RAZAIDI BIN HUSSIN
(Universiti Malaysia Perlis)
Welcoming Remarks
SAWAL HAMID BIN MD ALI
(Universiti Kebangsaan Malaysia)
Opening Remarks
SoC: A Practical Implementation Overview on Intelligent Neurosystems
SISTERNA CRISTIAN ALEJANDRO
(Universidad Nacional de San Juan Instituto de Investigaciones Antisismicas)
Multi-Processor System-on-Chip (MPSoC) Architecture
Multi_Processor_System-on-Chip_(MPSoC)_Architecture.pdf
MPSoCs & Heterogeneous Computing
MPSoCs_Heterogeneous_Computing.pdf
Vivado IDE Design Flow - Part I
Vivado IDE Flow - Part II
Hardware Description Language: Implementation and Simulation
HardwareDescriptionlanguage_Implementation_Simulation(1).pdf
Design Methodology for MPSoC-Based Systems
SRIVASTAVA GEETIKA
(Department of Physics and Electronics Dr. Rammanohar Lohia Avadh University Ayodhya)
Optimizing the Hardware that executes the AI Model
Presentation_18_September_Geetika.pdf
Organizers
Reaz Md Mamun Bin Ibne (University of Malaysia Perlis), Razaidi Bin Hussin (University of Malaysia Perlis), Sawal Hamid Bin Md Ali (University of Kebangsaan Malaysia), ICTP Scientific Contact: Maria Liz Crespo (ICTP)
Co-sponsors