Laboratory Session: Digital Signal Processing with FPGA. A design example.
Place
Location: Trieste - Italy
Date:
16 Nov 16:00 - 18:00
Timetable | Contribution List
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Presented by C. SOSA PAEZ
on
16/11/2009
at
16:00
Organizers
Directors: N. Abdallah, A. Cicuttin, A. Marchioro. Local Organizer: M.L. Crespo