Advanced Training Course on FPGA Design and VHDL for Hardware Simulation and Synthesis | (smr 2065) (26 October 2009 - 20 November 2009)

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Details for N. ABDALLAH

Affiliation	Actel Corp., CA, USA
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Author in the following contribution(s)

Course Introduction

Introduction to FPGA Synthesis. Introduction to VHDL

Introduction to Actel Prodcuts. Libero IDE Overview and Design Flow

Sinthesis I - Introduction to VHDL

Sinthesis II - Introduction to VHDL

(LiberoTM IDE) Design Entry

(LiberoTM IDE) Functional Simulation. Synthesis

Synthesis III - Advanced VHDL

(LiberoTM IDE) Place & Route

Design Verification and Timing Concepts

(LiberoTM IDE) Timing Constraints and Analysis

Programmable logic & FPGA architectures

(LiberoTM IDE) Post-Layout Simulation. Programming

Actel Fusion FPGA Architecture

Actel Fusion FPGA Architecture (cont.)

The Actel Fusion Embedded Development Kit

The Actel Fusion Embedded Development Kit (cont.)

System-on-Chip Concepts.

System-on-Chip Concepts (cont.)

Organizers

Directors: N. Abdallah, A. Cicuttin, A. Marchioro. Local Organizer: M.L. Crespo

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