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Speaker List

Displaying 13 speakers out of 13
ALEXANDER KLUGE (CERN, Geneva, Switzerland)
Advanced Scientific Applications of FPGA
Advanced Scientific Applications of FPGA 2
Advanced Scientific Applications of FPGA 3
Advanced Scientific Applications of FPGA 4
ANDRES CICUTTIN (ICTP, Trieste, Italy)
FPGA Debugging
Wishbone IP Interface Standard
Wishbone IP Interface Standard 2
CARLOS SOSA PAEZ (University of San Luis, Argentina)
Digital Signal Processing with FPGA. PMOD Modules (AD, DA, BNC). Design Example.
CRISTIAN SISTERNA (University of San Juan, Argentina)
FPGA Technology
FPGA Design Techniques
FPGA Timing and Tools for High Performance
VHDL for FPGA Design
VHDL for FPGA Design 2
VHDL for FPGA Design 3
VHDL for FPGA Design 4
VHDL for FPGA Design 5
VHDL for FPGA Design 6
VHDL for FPGA Design 7
ISE WebPACK Design Software - Testbench - A Design Example
DIEGO COSTA (University of San Luis, Argentina)
Digital Signal Processing
Digital Signal Processing 2
Digital Signal Processing 3
Digital Signal Processing 4
Digital Signal Processing 5
Digital Signal Processing 6
ICTP SECRETARIAT
REGISTRATION
MARCELO MAGNASCO (Rockfeller Uinveristy, NYC, USA)
Advanced Topics in Digital Signal Processing
Advanced Topics in Digital Signal Processing2
Applications in Digital Signal Processing
Applications in Digital Signal Processing 2
MARIA LIZ CRESPO (ICTP, Trieste, Italy)
Multidisciplinary Laboratory at ICTP
Laboratory Overview
Reconfigurable Virtual Instrumentation (RVI) based on FPGA
MIGUEL RISCO CASTILLO (Technological University of Peru, Lima , Peru)
Hardware Description of FPGA Development Platform: Nexys 2
ICTP RVI platform - Demo
PAULO MOREIRA (CERN, Geneva, Switzerland)
Microelectronics at CERN
Introduction to CMOS technology and VLSI Design
CMOS technology
VLSI Design
PIROUZ BAZARGAN-SABET (Unviersity Pierre & Marie Curie, Paris, France)
Digital Design
Digital Design - Combinatorial elements
Digital Design - Sequential elements, Mealy and Moore FSM
Digital Design - More complex elements: RAM, ROM, buses, pipeline concept, etc
Digital arithmetic - Number representations
Digital arithmetic - Basic arithmetic operations
RAUL ARTECHE DIAZ (CEADEN, Cuba)
Sequential Logic Described in VHDL - A Design Example
TUTORS
Combinational Logic Described in VHDL - Description, Synthesis and Simulation
Combinational Logic Described in VHDL - Synthesis and Implementation
Combinational Logic Described in VHDL - Synthesis and Implementation
Combinational Logic Described in VHDL - Synthesis and Implementation
Sequential Logic Described in VHDL
Sequential Logic Described in VHDL
Sequential Logic Described in VHDL
Sequential Logic Described in VHDL
Sequential Logic Described in VHDL
Digital Signal Processing with FPGA
Digital Signal Processing with FPGA
Digital Signal Processing with FPGA
Digital Signal Processing with FPGA
Digital Signal Processing with FPGA
Digital Signal Processing with FPGA
Digital Signal Processing with FPGA
Digital Signal Processing with FPGA
Digital Signal Processing with FPGA
Projects on RVI and DSP
Projects on RVI and DSP
Projects on RVI and DSP
Projects on RVI and DSP

Organizers

Directors: L. Hernandez Tabares (Cuba) , N. Abdallah (USA), A. Cicuttin and M.L. Crespo (ICTP)