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Displaying 27 speakers out of 27
AGUSTIN SILVA (National University of Mar del Plata, Argentina)
Reinforcement Learning and Quantum Computing
ANDRES CICUTTIN (ICTP, Italy)
Reconfigurable Virtual Instrumentation (RVI) based on SoC-FPGA
Project 2 - Digital pulse processing for X-ray photon detection and energy measurement
BRUNO VALINOTI (ICTP, Italy)
Project-2 - SoC-FPGA Digital Pulse Processor and Guide for Lab 2.2
CRISTIAN SISTERNA (Universidad Nacional de San Juan, Instituto de Investigaciones Antisismicas, Argentina)
FPGA and System-on-Chip (SoC) technology
SoC architecture and design methodology
SoC architecture and design methodology (cont.)
Zynq-7000 SoC: Evaluation and Development Board
C for Embedded Systems
C for Embedded Systems (cont.)
Hardware and Software Interrupts on SoC
AXI Bus and Custom IP Cores
Fundamentals of VHDL (Hardware Description Language)
VHDL for Synthesis
VHDL for Simulation (Testbench)
EMILIO PAOLINI (Scuola Superiore Sant'Anna, TeCIP Institute, Italy)
Quantization in Neural Networks: Advantages and Limitations
FERNANDO RINCON CALLE (Universidad de Castilla la Mancha, Spain)
High Level Synthesis (HLS)
HLS Tutorial
FLORENT DUPONT DE DINECHIN (National Institut of Applied Sciences, France)
FPGAs computing just right thanks to application-specific arithmetic
FPGAs computing just right thanks to application-specific arithmetic (cont.)
The FloPoCo arithmetic core generator
The FloPoCo arithmetic core generator (cont.)
GUSTAVO SUTTER CAPRISTO (Universidad Autonoma de Madrid Tecnologia Electronica y de las Comunicaciones, Spain)
New SoC platforms for Al and Algorithm Acceleration
New SoC platforms for Al and Algorithm Acceleration (cont.)
HEINRICH RONGEN (Forschungszentrum Juelich Gmbh ZEA2 Electronic Systems, Germany)
Real Time Operating System (FreeRTOS)
FreeRTOS Tutorial
FreeRTOS Tutorial
IVAN MORALES ARGUETA (ICTP, Italy)
Guide for Lab 4: External Interrupt Sw/Hw
Guide for Lab 8: SoC-FPGA DAQ System and TCL
Project 1 - Advanced Configuration of the FPGA on the custom-designed platform for DPP and Guide for Lab 1.2
KALLIOPI KANAKI (IAEA, Austria)
IAEA NSIL: Support to IAEA Member States and Recent Developments
KASUN MANNATUNGA (University of Moratuwa, Sri Lanka)
High Channel Count for Electrophysiology (HiCCE)
LUCA VALCARENGHI (Scuola Superiore Sant'Anna, TeCIP Institute, Italy)
Programmable hardware acceleration in Communication Networks
The role of programmable hardware acceleration in the edge-cloud continuum
LUIS GARCIA ORDONEZ (ICTP, Italy)
Connectivity testing for lab activities
Introduction to Lab Activities
Guide for Lab 5: Direct Memory Access (DMA)
Project-2 - SoC-FPGA Data Acquisition and Guide for Lab 2.1
LUIS GARCIA ORDONEZ (ICTP, ITALY), BRUNO VALINOTI (ICTP, ITALY), WERNER FLORIAN (ICTP, ITALY)
Project-2: SoC-FPGA Data Acquisition and Digital Pulse Processing for Radiation Detectors and Guide for Lab 2.3
Project 2 - Demo: SoC-FPGA Data Acquisition, Digital Pulse Processing and Live Measurements
MAMUN BIN IBNE REAZ (Universiti Kebangsaan Malaysia, Malaysia)
Academic Writing Strategy for Impacted Journal
MARIA LIZ CRESPO (ICTP, Italy)
School Outline
Introduction to Projects Activities
ICTP programmes and MLAB activities
MARIA LIZ CRESPO (ICTP, ITALY), KALLIOPI KANAKI (IAEA, AUSTRIA), ANDRES CICUTTIN, (ICTP, ITALY), MLADEN BOGOVAC (IAEA, AUSTRIA)
Welcome to the School
Participants Awards, Distribution of Certificates, and Closing Remarks
MAYNOR BALLINA ESCOBAR (Universidad de San Carlos de Guatemala, Guatemala)
Guide for Lab 2: GPIO In/Out
MIRKO MARIOTTI (University of Perugia, Italy)
BondMachine, a mouldable computer architecture
BondMachine, a mouldable computer architecture (cont.)
MLADEN BOGOVAC (IAEA, Austria)
Project 1 - Data Acquisition System based on FPGA for Ionization Radiation Measurement
Project-1 - Advanced Digital Pulse Processing (DPP) Algorithms for Radiation Detectors
Project 1 - FPGA Peripheral Configuration and Microblaze Soft Core Design on Custom-Designed Hardware Platform for DPP and Guide for Lab 1.3
MLADEN BOGOVAC (IAEA, AUSTRIA), NIKOLA JOVALEKIC (TELEDYNE DALSA, NETHERLANDS), IVAN MORALES ARGUETA (ICTP, ITALY)
Project 1 - Demo: Integration of the DPP Platform with Advanced Processing Algorithm and Live Measurements
NIKOLA JOVALEKIC (Teledyne DALSA, Netherlands)
Custom-designed Data Acquisition System based on FPGA for Ionization Radiation Measurement
Project 1 - Deep Dive: Custom-Designed System for Advanced DPP for Radiation Detectors
Project 1 - Software configuration (bring-up) of the custom-designed hardware platform for DPP and Guide for Lab 1.1
Open-source Toolchain for ARM-based Microcontrollers: Motivation and Methodology
PIROUZ BAZARGAN SABET (Sorbonne University, France)
Logic design and finite state machines
Digital numbers representation: fixed point vs floating point
Digital Arithmetic
Floating point operations: square root and division
ROMINA MOLINA (University of Trieste, Italy)
FPGA for Accelerating Machine Learning Algorithms
SAWAL HAMID BIN MD ALI (University Kebangsaan Malaysia, Malaysia)
Computer vision on FPGA
WERNER FLORIAN (ICTP, Italy)
The RVI communication block: ComBlock
SoC-FPGA Development Framework: UDMA & CLI
GIT for Open Science

Organizers

Maria Liz Crespo (ICTP), Kalliopi Kanaki (IAEA), Mladen Bogovac (IAEA), Andres Cicuttin (ICTP), Local Organiser: Maria Liz Crespo (ICTP)

Co-sponsors